Changes by: Jason Hickey (jyh at cs.caltech.edu)
Date: 2004-04-07 20:20:58 -0700 (Wed, 07 Apr 2004)
Revision: 5618
Log message:
. Corrected a problem with implicit moves in liveness analysis.
. Suppose we have a 3-operand instruction that does not directly
. map to the hardware. For example, consider this instruction:
.
. add %v1, %v2, v3. // v3 <- v1 + v2
.
. The hardware has only 2-operand instructions, so v2 and v3 must be
. the same register. This works if we add an "implicit" move before
. the instruction. This is the sequence that is emitted:
.
. mov %v2, %v3 // v3 <- v2 (implicit mov)
. add %v1, %v3 // v3 += v1
.
. This is no problem. However, the liveness analysis should not
. treat the implicit move like a real move. The allocator should
. try to coalesce v2 and v3, but it should not consider that
. this sequence has 2 definitions of v3. The *length* of the
. definition should be computed as if the definition happens
. at the add.